Nat Semi DM7472N AND-gated J-K MS Flip-Flop with Ps & Cl DIL14

Manufactured by National Semiconductor - DM7472N (same as SN7472N) - DIL14 through hole package.

AND-Gated J-K Master-Slave Flip-Flops with Preset and Clear

These J-K flip-flops are based on the master-slave principle and each jas AND gate inputs for entry into the master section which are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operatio is as follows:

• 1.  Isolate slave from master
• 2.  Enter information from AND gate inputs to master
• 3.  Disable AND gate inputs
• 4.  Transfer information from master to slave

The logical states of the J and K inputs must not be allowed to change when the clock pulse is in a high state.